We really like the profiles that decode most common serial protocols; 1-Wire, I2C, SPI, and asynchronous serial. CAN and other protocols will be added eventually.

The software analyzes and displays signal captures. The primary configuration options are the sampling rate (200KHz-24MHz) and number of samples (millions to billions). We were able to sample at 24MHz, but the top speed depends on how much other stuff is using the USB bus. A 24MHz sampling rate can capture signals up to 12MHz, we found this suitable for all the protocols we use. The total number of samples is limited only by the available PC RAM. I looked at both this logic analyzer and the Usbee SX just last month, when I finally decided that my old Tektronix 1241 was no longer worth the electricity it burned, and even with GPIB couldn’t give me the flexibility I needed.We also tried the 1-Wire decoder with a DS2431 EEPROM. The software identified the 1-Wire reset command, and the 1-Wire ‘search rom’ command (0xf0). Ian – re other products: I don’t want to post a commercial for anyone, so I won’t mention my favorite by brand name. Just do a google search for “logic analyzer”. There’s about a zillion products in this price range out there these days. Now if I could only find a decent USB 2.0 oscilloscope. I think though, that that’s one realm where I still need a real device, perhaps with a decent USB transfer and control interface. 250MS/sec+, 2+ channels, 600V+ and decent triggering options (say an external trigger that I provide with the logic analyzer?) It is licensed under the terms of the GNU GPL, version 3 or later. Design goals and features include: Logic analyzers take the guess work out of debugging inter-chip communication. If you can’t see what’s going on, the best you can do is guess about the problem. When a project won’t work, 99% of the time we can solve the problem immediately by looking at the signals with a logic analyzer. Without it, there’s no easy way to know what’s happening.

Reusable libraries. Consists of the libsigrok and libsigrokdecode shared libraries which can be used by various frontends/GUIs.wooddragon48 has updated components for the project titled 3D Printed Repeating Crossbow/Sling Shot Pistol. Big DNL spikes caused by an apparent mismatch between capacitors used in simulation and production, James Adams confirms. ericwertz – if you need to look at 50mhz digital data, then 100Mhz sampling is not nearly enough. Nyquist theory is meaningful for analog analysis, and is a limitation that applies directly to the highest frequency pure sine wave component of the signal – exclusive of phase. Digital analysis is very different. You could barely represent a square wave sampling at Nyquist, and thus would get virtually no timing information from the resulting waveforms. You’ll need to sample 4-10 times your bus rate to get meaningful timing information.

There are Differential Non-Linearities [2] and Integral Non-Linearities [3] caused by mis-matching of on-die ADC capacitors. Broad hardware support. Supports many different devices (logic analyzers, oscilloscopes, multimeters, data loggers etc.) from various vendors. This transaction shows the host issue the read configuration register command (0x05), and the SRAM response (0x41). A logic analyzer records bus communications between two chips. If you’ve ever had a problem getting two chips to talk, or wanted to reverse engineer a protocol, a logic analyzer is the tool you need to spy on the bus.fiddlingjunky said: “One thing to keep in mind is the RP2040/Pi Pico does have a hardware bug (slightly mis-specced internal capacitances) that create ~9LSB non-linearity (0.22% of measurement range) at 4 points.”